Merge "Inline ldrex/strex for thumb2, remove ARMv5 remnants."
This commit is contained in:
commit
78432ab1f4
1 changed files with 36 additions and 126 deletions
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@ -18,55 +18,33 @@
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#define ANDROID_CUTILS_ATOMIC_ARM_H
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#define ANDROID_CUTILS_ATOMIC_ARM_H
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#include <stdint.h>
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#include <stdint.h>
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#include <machine/cpu-features.h>
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#ifndef ANDROID_ATOMIC_INLINE
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#ifndef ANDROID_ATOMIC_INLINE
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#define ANDROID_ATOMIC_INLINE inline __attribute__((always_inline))
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#define ANDROID_ATOMIC_INLINE inline __attribute__((always_inline))
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#endif
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#endif
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extern ANDROID_ATOMIC_INLINE void android_compiler_barrier(void)
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extern ANDROID_ATOMIC_INLINE void android_compiler_barrier()
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{
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{
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__asm__ __volatile__ ("" : : : "memory");
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__asm__ __volatile__ ("" : : : "memory");
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}
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}
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extern ANDROID_ATOMIC_INLINE void android_memory_barrier()
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{
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#if ANDROID_SMP == 0
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#if ANDROID_SMP == 0
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extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void)
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{
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android_compiler_barrier();
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android_compiler_barrier();
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}
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extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier(void)
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{
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android_compiler_barrier();
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}
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#elif defined(__ARM_HAVE_DMB)
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extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void)
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{
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__asm__ __volatile__ ("dmb" : : : "memory");
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}
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extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier(void)
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{
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__asm__ __volatile__ ("dmb st" : : : "memory");
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}
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#elif defined(__ARM_HAVE_LDREX_STREX)
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extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void)
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{
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__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0) : "memory");
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}
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extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier(void)
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{
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android_memory_barrier();
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}
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#else
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#else
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extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void)
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__asm__ __volatile__ ("dmb" : : : "memory");
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{
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typedef void (kuser_memory_barrier)(void);
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(*(kuser_memory_barrier *)0xffff0fa0)();
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}
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extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier(void)
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{
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android_memory_barrier();
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}
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#endif
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#endif
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}
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extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier()
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{
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#if ANDROID_SMP == 0
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android_compiler_barrier();
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#else
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__asm__ __volatile__ ("dmb st" : : : "memory");
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#endif
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}
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extern ANDROID_ATOMIC_INLINE
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extern ANDROID_ATOMIC_INLINE
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int32_t android_atomic_acquire_load(volatile const int32_t *ptr)
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int32_t android_atomic_acquire_load(volatile const int32_t *ptr)
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@ -83,32 +61,32 @@ int32_t android_atomic_release_load(volatile const int32_t *ptr)
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return *ptr;
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return *ptr;
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}
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}
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extern ANDROID_ATOMIC_INLINE void
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extern ANDROID_ATOMIC_INLINE
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android_atomic_acquire_store(int32_t value, volatile int32_t *ptr)
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void android_atomic_acquire_store(int32_t value, volatile int32_t *ptr)
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{
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{
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*ptr = value;
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*ptr = value;
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android_memory_barrier();
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android_memory_barrier();
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}
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}
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extern ANDROID_ATOMIC_INLINE void
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extern ANDROID_ATOMIC_INLINE
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android_atomic_release_store(int32_t value, volatile int32_t *ptr)
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void android_atomic_release_store(int32_t value, volatile int32_t *ptr)
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{
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{
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android_memory_barrier();
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android_memory_barrier();
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*ptr = value;
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*ptr = value;
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}
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}
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#if defined(__thumb__)
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extern ANDROID_ATOMIC_INLINE
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extern int android_atomic_cas(int32_t old_value, int32_t new_value,
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int android_atomic_cas(int32_t old_value, int32_t new_value,
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volatile int32_t *ptr);
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volatile int32_t *ptr)
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#elif defined(__ARM_HAVE_LDREX_STREX)
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extern ANDROID_ATOMIC_INLINE int
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android_atomic_cas(int32_t old_value, int32_t new_value, volatile int32_t *ptr)
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{
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{
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int32_t prev, status;
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int32_t prev, status;
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do {
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do {
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__asm__ __volatile__ ("ldrex %0, [%3]\n"
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__asm__ __volatile__ ("ldrex %0, [%3]\n"
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"mov %1, #0\n"
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"mov %1, #0\n"
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"teq %0, %4\n"
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"teq %0, %4\n"
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#ifdef __thumb2__
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"it eq\n"
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#endif
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"strexeq %1, %5, [%3]"
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"strexeq %1, %5, [%3]"
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: "=&r" (prev), "=&r" (status), "+m"(*ptr)
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: "=&r" (prev), "=&r" (status), "+m"(*ptr)
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: "r" (ptr), "Ir" (old_value), "r" (new_value)
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: "r" (ptr), "Ir" (old_value), "r" (new_value)
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@ -116,49 +94,26 @@ android_atomic_cas(int32_t old_value, int32_t new_value, volatile int32_t *ptr)
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} while (__builtin_expect(status != 0, 0));
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} while (__builtin_expect(status != 0, 0));
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return prev != old_value;
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return prev != old_value;
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}
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}
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#else
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extern ANDROID_ATOMIC_INLINE int
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android_atomic_cas(int32_t old_value, int32_t new_value, volatile int32_t *ptr)
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{
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typedef int (kuser_cmpxchg)(int32_t, int32_t, volatile int32_t *);
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int32_t prev, status;
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prev = *ptr;
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do {
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status = (*(kuser_cmpxchg *)0xffff0fc0)(old_value, new_value, ptr);
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if (__builtin_expect(status == 0, 1))
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return 0;
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prev = *ptr;
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} while (prev == old_value);
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return 1;
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}
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#endif
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extern ANDROID_ATOMIC_INLINE int
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extern ANDROID_ATOMIC_INLINE
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android_atomic_acquire_cas(int32_t old_value,
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int android_atomic_acquire_cas(int32_t old_value, int32_t new_value,
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int32_t new_value,
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volatile int32_t *ptr)
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volatile int32_t *ptr)
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{
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{
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int status = android_atomic_cas(old_value, new_value, ptr);
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int status = android_atomic_cas(old_value, new_value, ptr);
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android_memory_barrier();
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android_memory_barrier();
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return status;
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return status;
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}
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}
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extern ANDROID_ATOMIC_INLINE int
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extern ANDROID_ATOMIC_INLINE
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android_atomic_release_cas(int32_t old_value,
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int android_atomic_release_cas(int32_t old_value, int32_t new_value,
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int32_t new_value,
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volatile int32_t *ptr)
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volatile int32_t *ptr)
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{
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{
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android_memory_barrier();
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android_memory_barrier();
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return android_atomic_cas(old_value, new_value, ptr);
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return android_atomic_cas(old_value, new_value, ptr);
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}
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}
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extern ANDROID_ATOMIC_INLINE
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#if defined(__thumb__)
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int32_t android_atomic_add(int32_t increment, volatile int32_t *ptr)
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extern int32_t android_atomic_add(int32_t increment,
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volatile int32_t *ptr);
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#elif defined(__ARM_HAVE_LDREX_STREX)
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extern ANDROID_ATOMIC_INLINE int32_t
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android_atomic_add(int32_t increment, volatile int32_t *ptr)
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{
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{
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int32_t prev, tmp, status;
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int32_t prev, tmp, status;
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android_memory_barrier();
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android_memory_barrier();
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@ -173,19 +128,6 @@ android_atomic_add(int32_t increment, volatile int32_t *ptr)
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} while (__builtin_expect(status != 0, 0));
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} while (__builtin_expect(status != 0, 0));
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return prev;
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return prev;
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}
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}
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#else
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extern ANDROID_ATOMIC_INLINE int32_t
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android_atomic_add(int32_t increment, volatile int32_t *ptr)
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{
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int32_t prev, status;
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android_memory_barrier();
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do {
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prev = *ptr;
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status = android_atomic_cas(prev, prev + increment, ptr);
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} while (__builtin_expect(status != 0, 0));
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return prev;
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}
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#endif
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extern ANDROID_ATOMIC_INLINE int32_t android_atomic_inc(volatile int32_t *addr)
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extern ANDROID_ATOMIC_INLINE int32_t android_atomic_inc(volatile int32_t *addr)
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{
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{
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@ -197,11 +139,8 @@ extern ANDROID_ATOMIC_INLINE int32_t android_atomic_dec(volatile int32_t *addr)
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return android_atomic_add(-1, addr);
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return android_atomic_add(-1, addr);
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}
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}
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#if defined(__thumb__)
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extern ANDROID_ATOMIC_INLINE
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extern int32_t android_atomic_and(int32_t value, volatile int32_t *ptr);
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int32_t android_atomic_and(int32_t value, volatile int32_t *ptr)
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#elif defined(__ARM_HAVE_LDREX_STREX)
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extern ANDROID_ATOMIC_INLINE int32_t
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android_atomic_and(int32_t value, volatile int32_t *ptr)
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{
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{
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int32_t prev, tmp, status;
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int32_t prev, tmp, status;
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android_memory_barrier();
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android_memory_barrier();
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@ -216,25 +155,9 @@ android_atomic_and(int32_t value, volatile int32_t *ptr)
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} while (__builtin_expect(status != 0, 0));
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} while (__builtin_expect(status != 0, 0));
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return prev;
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return prev;
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}
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}
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#else
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extern ANDROID_ATOMIC_INLINE int32_t
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android_atomic_and(int32_t value, volatile int32_t *ptr)
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{
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int32_t prev, status;
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android_memory_barrier();
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do {
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prev = *ptr;
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status = android_atomic_cas(prev, prev & value, ptr);
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} while (__builtin_expect(status != 0, 0));
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return prev;
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}
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#endif
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#if defined(__thumb__)
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extern ANDROID_ATOMIC_INLINE
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extern int32_t android_atomic_or(int32_t value, volatile int32_t *ptr);
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int32_t android_atomic_or(int32_t value, volatile int32_t *ptr)
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#elif defined(__ARM_HAVE_LDREX_STREX)
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extern ANDROID_ATOMIC_INLINE int32_t
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android_atomic_or(int32_t value, volatile int32_t *ptr)
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{
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{
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int32_t prev, tmp, status;
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int32_t prev, tmp, status;
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android_memory_barrier();
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android_memory_barrier();
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@ -249,18 +172,5 @@ android_atomic_or(int32_t value, volatile int32_t *ptr)
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} while (__builtin_expect(status != 0, 0));
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} while (__builtin_expect(status != 0, 0));
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return prev;
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return prev;
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}
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}
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#else
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extern ANDROID_ATOMIC_INLINE int32_t
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android_atomic_or(int32_t value, volatile int32_t *ptr)
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{
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int32_t prev, status;
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android_memory_barrier();
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do {
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prev = *ptr;
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status = android_atomic_cas(prev, prev | value, ptr);
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} while (__builtin_expect(status != 0, 0));
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return prev;
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}
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#endif
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#endif /* ANDROID_CUTILS_ATOMIC_ARM_H */
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#endif /* ANDROID_CUTILS_ATOMIC_ARM_H */
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