Merge "[MIPS64] Use generic cpu-independent libpixelflinger for mips64"
This commit is contained in:
commit
aa2be4fd69
2 changed files with 6 additions and 6 deletions
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@ -39,7 +39,7 @@
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#include "codeflinger/ARMAssembler.h"
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#include "codeflinger/ARMAssembler.h"
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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#include "codeflinger/Arm64Assembler.h"
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#include "codeflinger/Arm64Assembler.h"
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#elif defined(__mips__)
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#elif defined(__mips__) && !defined(__LP64__)
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#include "codeflinger/MIPSAssembler.h"
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#include "codeflinger/MIPSAssembler.h"
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#endif
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#endif
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//#include "codeflinger/ARMAssemblerOptimizer.h"
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//#include "codeflinger/ARMAssemblerOptimizer.h"
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@ -59,7 +59,7 @@
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# define ANDROID_CODEGEN ANDROID_CODEGEN_GENERATED
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# define ANDROID_CODEGEN ANDROID_CODEGEN_GENERATED
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#endif
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#endif
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#if defined(__arm__) || defined(__mips__) || defined(__aarch64__)
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#if defined(__arm__) || (defined(__mips__) && !defined(__LP64__)) || defined(__aarch64__)
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# define ANDROID_ARM_CODEGEN 1
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# define ANDROID_ARM_CODEGEN 1
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#else
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#else
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# define ANDROID_ARM_CODEGEN 0
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# define ANDROID_ARM_CODEGEN 0
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@ -73,7 +73,7 @@
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*/
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*/
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#define DEBUG_NEEDS 0
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#define DEBUG_NEEDS 0
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#ifdef __mips__
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#if defined( __mips__) && !defined(__LP64__)
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#define ASSEMBLY_SCRATCH_SIZE 4096
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#define ASSEMBLY_SCRATCH_SIZE 4096
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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#define ASSEMBLY_SCRATCH_SIZE 8192
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#define ASSEMBLY_SCRATCH_SIZE 8192
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@ -134,7 +134,7 @@ extern "C" void scanline_col32cb16blend_arm(uint16_t *dst, uint32_t col, size_t
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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extern "C" void scanline_t32cb16blend_arm64(uint16_t*, uint32_t*, size_t);
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extern "C" void scanline_t32cb16blend_arm64(uint16_t*, uint32_t*, size_t);
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extern "C" void scanline_col32cb16blend_arm64(uint16_t *dst, uint32_t col, size_t ct);
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extern "C" void scanline_col32cb16blend_arm64(uint16_t *dst, uint32_t col, size_t ct);
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#elif defined(__mips__)
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#elif defined(__mips__) && !defined(__LP64__)
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extern "C" void scanline_t32cb16blend_mips(uint16_t*, uint32_t*, size_t);
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extern "C" void scanline_t32cb16blend_mips(uint16_t*, uint32_t*, size_t);
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#endif
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#endif
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@ -2175,7 +2175,7 @@ last_one:
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void scanline_t32cb16blend(context_t* c)
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void scanline_t32cb16blend(context_t* c)
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{
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{
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#if ((ANDROID_CODEGEN >= ANDROID_CODEGEN_ASM) && (defined(__arm__) || defined(__mips__) || defined(__aarch64__)))
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#if ((ANDROID_CODEGEN >= ANDROID_CODEGEN_ASM) && (defined(__arm__) || (defined(__mips__) && !defined(__LP64__)) || defined(__aarch64__)))
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int32_t x = c->iterators.xl;
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int32_t x = c->iterators.xl;
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size_t ct = c->iterators.xr - x;
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size_t ct = c->iterators.xr - x;
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int32_t y = c->iterators.y;
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int32_t y = c->iterators.y;
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@ -52,7 +52,7 @@ static void ggl_test_codegen(uint32_t n, uint32_t p, uint32_t t0, uint32_t t1)
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GGLAssembler assembler( new ARMAssembler(a) );
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GGLAssembler assembler( new ARMAssembler(a) );
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#endif
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#endif
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#if defined(__mips__)
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#if defined(__mips__) && !defined(__LP64__)
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GGLAssembler assembler( new ArmToMipsAssembler(a) );
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GGLAssembler assembler( new ArmToMipsAssembler(a) );
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#endif
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#endif
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