am 6d9a5ac3: Merge "[MIPSR6] Skip pixelflinger, memset assembler code on mips32r6"
* commit '6d9a5ac394ba7bd813921812988a23d8e9b96ee1': [MIPSR6] Skip pixelflinger, memset assembler code on mips32r6
This commit is contained in:
commit
e07a6e6337
5 changed files with 23 additions and 11 deletions
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@ -190,7 +190,7 @@ inline int64_t gglMulii(int32_t x, int32_t y)
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);
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);
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return res;
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return res;
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}
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}
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#elif defined(__mips__)
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#elif defined(__mips__) && __mips_isa_rev < 6
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/*inline MIPS implementations*/
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/*inline MIPS implementations*/
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inline GGLfixed gglMulx(GGLfixed a, GGLfixed b, int shift) CONST;
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inline GGLfixed gglMulx(GGLfixed a, GGLfixed b, int shift) CONST;
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@ -124,9 +124,17 @@ LOCAL_SRC_FILES_arm += \
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LOCAL_SRC_FILES_arm64 += \
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LOCAL_SRC_FILES_arm64 += \
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arch-arm64/android_memset.S \
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arch-arm64/android_memset.S \
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ifndef ARCH_MIPS_REV6
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LOCAL_SRC_FILES_mips += \
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LOCAL_SRC_FILES_mips += \
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arch-mips/android_memset.c \
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arch-mips/android_memset.c \
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LOCAL_CFLAGS_mips += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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endif
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# TODO: switch mips64 back to using arch-mips/android_memset.c
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LOCAL_SRC_FILES_mips64 += \
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# arch-mips/android_memset.c \
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LOCAL_SRC_FILES_x86 += \
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LOCAL_SRC_FILES_x86 += \
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arch-x86/android_memset16.S \
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arch-x86/android_memset16.S \
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arch-x86/android_memset32.S \
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arch-x86/android_memset32.S \
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@ -137,7 +145,7 @@ LOCAL_SRC_FILES_x86_64 += \
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LOCAL_CFLAGS_arm += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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LOCAL_CFLAGS_arm += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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LOCAL_CFLAGS_arm64 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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LOCAL_CFLAGS_arm64 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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LOCAL_CFLAGS_mips += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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#LOCAL_CFLAGS_mips64 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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LOCAL_CFLAGS_x86 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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LOCAL_CFLAGS_x86 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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LOCAL_CFLAGS_x86_64 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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LOCAL_CFLAGS_x86_64 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
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@ -44,11 +44,13 @@ PIXELFLINGER_SRC_FILES_arm64 := \
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arch-arm64/col32cb16blend.S \
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arch-arm64/col32cb16blend.S \
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arch-arm64/t32cb16blend.S \
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arch-arm64/t32cb16blend.S \
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ifndef ARCH_MIPS_REV6
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PIXELFLINGER_SRC_FILES_mips := \
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PIXELFLINGER_SRC_FILES_mips := \
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codeflinger/MIPSAssembler.cpp \
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codeflinger/MIPSAssembler.cpp \
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codeflinger/mips_disassem.c \
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codeflinger/mips_disassem.c \
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arch-mips/t32cb16blend.S \
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arch-mips/t32cb16blend.S \
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endif
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#
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#
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# Shared library
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# Shared library
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#
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#
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@ -39,7 +39,7 @@
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#include "codeflinger/ARMAssembler.h"
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#include "codeflinger/ARMAssembler.h"
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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#include "codeflinger/Arm64Assembler.h"
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#include "codeflinger/Arm64Assembler.h"
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#elif defined(__mips__) && !defined(__LP64__)
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#elif defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
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#include "codeflinger/MIPSAssembler.h"
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#include "codeflinger/MIPSAssembler.h"
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#endif
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#endif
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//#include "codeflinger/ARMAssemblerOptimizer.h"
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//#include "codeflinger/ARMAssemblerOptimizer.h"
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@ -59,7 +59,7 @@
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# define ANDROID_CODEGEN ANDROID_CODEGEN_GENERATED
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# define ANDROID_CODEGEN ANDROID_CODEGEN_GENERATED
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#endif
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#endif
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#if defined(__arm__) || (defined(__mips__) && !defined(__LP64__)) || defined(__aarch64__)
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#if defined(__arm__) || (defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6) || defined(__aarch64__)
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# define ANDROID_ARM_CODEGEN 1
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# define ANDROID_ARM_CODEGEN 1
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#else
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#else
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# define ANDROID_ARM_CODEGEN 0
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# define ANDROID_ARM_CODEGEN 0
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@ -73,7 +73,7 @@
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*/
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*/
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#define DEBUG_NEEDS 0
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#define DEBUG_NEEDS 0
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#if defined( __mips__) && !defined(__LP64__)
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#if defined( __mips__) && !defined(__LP64__) && __mips_isa_rev < 6
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#define ASSEMBLY_SCRATCH_SIZE 4096
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#define ASSEMBLY_SCRATCH_SIZE 4096
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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#define ASSEMBLY_SCRATCH_SIZE 8192
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#define ASSEMBLY_SCRATCH_SIZE 8192
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@ -134,7 +134,7 @@ extern "C" void scanline_col32cb16blend_arm(uint16_t *dst, uint32_t col, size_t
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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extern "C" void scanline_t32cb16blend_arm64(uint16_t*, uint32_t*, size_t);
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extern "C" void scanline_t32cb16blend_arm64(uint16_t*, uint32_t*, size_t);
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extern "C" void scanline_col32cb16blend_arm64(uint16_t *dst, uint32_t col, size_t ct);
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extern "C" void scanline_col32cb16blend_arm64(uint16_t *dst, uint32_t col, size_t ct);
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#elif defined(__mips__) && !defined(__LP64__)
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#elif defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
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extern "C" void scanline_t32cb16blend_mips(uint16_t*, uint32_t*, size_t);
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extern "C" void scanline_t32cb16blend_mips(uint16_t*, uint32_t*, size_t);
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#endif
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#endif
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@ -286,7 +286,7 @@ static const needs_filter_t fill16noblend = {
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#if ANDROID_ARM_CODEGEN
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#if ANDROID_ARM_CODEGEN
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#if defined(__mips__)
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#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
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static CodeCache gCodeCache(32 * 1024);
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static CodeCache gCodeCache(32 * 1024);
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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static CodeCache gCodeCache(48 * 1024);
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static CodeCache gCodeCache(48 * 1024);
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@ -2175,7 +2175,7 @@ last_one:
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void scanline_t32cb16blend(context_t* c)
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void scanline_t32cb16blend(context_t* c)
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{
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{
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#if ((ANDROID_CODEGEN >= ANDROID_CODEGEN_ASM) && (defined(__arm__) || (defined(__mips__) && !defined(__LP64__)) || defined(__aarch64__)))
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#if ((ANDROID_CODEGEN >= ANDROID_CODEGEN_ASM) && (defined(__arm__) || (defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6) || defined(__aarch64__)))
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int32_t x = c->iterators.xl;
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int32_t x = c->iterators.xl;
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size_t ct = c->iterators.xr - x;
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size_t ct = c->iterators.xr - x;
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int32_t y = c->iterators.y;
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int32_t y = c->iterators.y;
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@ -9,16 +9,18 @@
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#include "codeflinger/CodeCache.h"
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#include "codeflinger/CodeCache.h"
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#include "codeflinger/GGLAssembler.h"
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#include "codeflinger/GGLAssembler.h"
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#include "codeflinger/ARMAssembler.h"
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#include "codeflinger/ARMAssembler.h"
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#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
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#include "codeflinger/MIPSAssembler.h"
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#include "codeflinger/MIPSAssembler.h"
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#endif
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#include "codeflinger/Arm64Assembler.h"
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#include "codeflinger/Arm64Assembler.h"
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#if defined(__arm__) || defined(__mips__) || defined(__aarch64__)
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#if defined(__arm__) || (defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6) || defined(__aarch64__)
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# define ANDROID_ARM_CODEGEN 1
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# define ANDROID_ARM_CODEGEN 1
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#else
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#else
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# define ANDROID_ARM_CODEGEN 0
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# define ANDROID_ARM_CODEGEN 0
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#endif
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#endif
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#if defined (__mips__)
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#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
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#define ASSEMBLY_SCRATCH_SIZE 4096
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#define ASSEMBLY_SCRATCH_SIZE 4096
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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#define ASSEMBLY_SCRATCH_SIZE 8192
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#define ASSEMBLY_SCRATCH_SIZE 8192
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@ -52,7 +54,7 @@ static void ggl_test_codegen(uint32_t n, uint32_t p, uint32_t t0, uint32_t t1)
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GGLAssembler assembler( new ARMAssembler(a) );
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GGLAssembler assembler( new ARMAssembler(a) );
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#endif
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#endif
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#if defined(__mips__) && !defined(__LP64__)
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#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
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GGLAssembler assembler( new ArmToMipsAssembler(a) );
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GGLAssembler assembler( new ArmToMipsAssembler(a) );
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#endif
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#endif
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