6835d019b2
This patch adds support for handling return addresses signed with
pointer authentication. It simply strips the authentication code
without verifying its correctness, and thus works with both A and B
keys and through key-change boundaries.
Additons:
* DW_CFA_AARCH64_negate_ra_state: new CFA operation.
* RA_SIGN_STATE: new pseudo register.
* Pass the arch to DwarfCfa so that the new op is only executed
on aarch64.
The stripping uses the xpaclri instruction. This is a hint space
instruction which is compatible with pre Armv8.3-A devices. For cases
where it cannot be used, a mask can be set instead.
Test: libunwindstack_test
Without this patch all UnwindTest.* testcases should fail if
compiled with Pointer Authentication.
The tests should be executed with both -mbranch-protection=pac-ret and
pac-ret+leaf flags so that either some or all functions have pointer
authentication instructions.
Change-Id: Id7c3f1d0e2fc7fccb19bd1430826264405a9df7c
74 lines
1.7 KiB
C++
74 lines
1.7 KiB
C++
/*
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* Copyright (C) 2017 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef _LIBUNWINDSTACK_MACHINE_ARM64_H
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#define _LIBUNWINDSTACK_MACHINE_ARM64_H
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#include <stdint.h>
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namespace unwindstack {
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enum Arm64Reg : uint16_t {
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ARM64_REG_R0 = 0,
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ARM64_REG_R1,
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ARM64_REG_R2,
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ARM64_REG_R3,
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ARM64_REG_R4,
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ARM64_REG_R5,
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ARM64_REG_R6,
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ARM64_REG_R7,
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ARM64_REG_R8,
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ARM64_REG_R9,
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ARM64_REG_R10,
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ARM64_REG_R11,
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ARM64_REG_R12,
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ARM64_REG_R13,
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ARM64_REG_R14,
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ARM64_REG_R15,
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ARM64_REG_R16,
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ARM64_REG_R17,
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ARM64_REG_R18,
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ARM64_REG_R19,
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ARM64_REG_R20,
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ARM64_REG_R21,
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ARM64_REG_R22,
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ARM64_REG_R23,
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ARM64_REG_R24,
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ARM64_REG_R25,
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ARM64_REG_R26,
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ARM64_REG_R27,
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ARM64_REG_R28,
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ARM64_REG_R29,
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ARM64_REG_R30,
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ARM64_REG_R31,
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ARM64_REG_PC,
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ARM64_REG_PSTATE,
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ARM64_REG_LAST,
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ARM64_REG_SP = ARM64_REG_R31,
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ARM64_REG_LR = ARM64_REG_R30,
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// Pseudo registers. These are not machine registers.
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// AARCH64 Return address signed state pseudo-register
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ARM64_PREG_RA_SIGN_STATE = 34,
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ARM64_PREG_FIRST = ARM64_PREG_RA_SIGN_STATE,
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ARM64_PREG_LAST,
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};
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} // namespace unwindstack
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#endif // _LIBUNWINDSTACK_MACHINE_ARM64_H
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