Revert LLCC changes
reverting below llcc changescc1a1dcb41soc: qcom: llcc: Handle a second device without data corruption813fdddde2soc: qcom: Rename llcc-slice to llcc-qcom077010717bsoc: qcom: llcc cleanup to get rid of sdm845 specific driver file Change-Id: Ia3588add7e8884d2b05fd770253c98afad41adf5 Signed-off-by: kamasali Satyanarayan <quic_kamasali@quicinc.com> Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
This commit is contained in:
Srinivasarao Pathipati
kamasali Satyanarayan
parent
a34cc1dcf7
commit
1ffd957fcf
5 changed files with 1517 additions and 94 deletions
File diff suppressed because it is too large
Load diff
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@ -7,20 +7,123 @@ obj-$(CONFIG_QCOM_GLINK_SSR) += glink_ssr.o
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obj-$(CONFIG_QCOM_GSBI) += qcom_gsbi.o
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obj-$(CONFIG_QCOM_MDT_LOADER) += mdt_loader.o
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obj-$(CONFIG_QCOM_PM) += spm.o
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obj-$(CONFIG_MSM_PIL) += peripheral-loader.o
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obj-$(CONFIG_MSM_SUBSYSTEM_RESTART) += subsystem_restart.o
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obj-$(CONFIG_MSM_CDSP_LOADER) += qdsp6v2/
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subsystem_restart-y := msm_subsystem_restart.o subsystem_notif.o ramdump.o sysmon-qmi.o
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obj-$(CONFIG_MSM_QUIN_SUBSYSTEM_NOTIF_VIRT) += subsystem_notif_virt.o
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obj-$(CONFIG_MSM_PIL_SSR_GENERIC) += subsys-pil-tz.o
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obj-$(CONFIG_MSM_PIL_MSS_QDSP6V5) += pil-q6v5.o pil-msa.o pil-q6v5-mss.o
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obj-$(CONFIG_MSM_SERVICE_NOTIFIER) += service-notifier.o
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obj-$(CONFIG_MSM_SERVICE_LOCATOR) += service-locator.o
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obj-$(CONFIG_QCOM_QMI_HELPERS) += qmi_helpers.o
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qmi_helpers-y += qmi_encdec.o qmi_interface.o
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obj-$(CONFIG_MEM_SHARE_QMI_SERVICE) += memshare/
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obj-$(CONFIG_QCOM_RMTFS_MEM) += rmtfs_mem.o
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obj-$(CONFIG_QCOM_RPMH) += qcom_rpmh.o
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qcom_rpmh-y += rpmh-rsc.o
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qcom_rpmh-y += rpmh.o
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obj-$(CONFIG_QCOM_SOC_SLEEP_STATS) += soc_sleep_stats.o
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obj-$(CONFIG_MSM_BOOT_STATS) += boot_stats.o
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obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o
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obj-$(CONFIG_QCOM_SMEM) += smem.o
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obj-$(CONFIG_MSM_PM_LEGACY) += pm-boot.o msm-pm.o
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obj-$(CONFIG_MSM_SPM) += msm-spm.o spm_devices.o
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obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o
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obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
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obj-$(CONFIG_QCOM_SUBSYSTEM_SLEEP_STATS) += subsystem_sleep_stats.o
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obj-$(CONFIG_QSEE_IPC_IRQ_BRIDGE) += qsee_ipc_irq_bridge.o
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obj-$(CONFIG_QCOM_SMSM) += smsm.o
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obj-$(CONFIG_MSM_CORE_HANG_DETECT) += core_hang_detect.o
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obj-$(CONFIG_QCOM_SECURE_BUFFER) += secure_buffer.o
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obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
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obj-$(CONFIG_QCOM_PROXY_OF_CONSUMER) += qcom_proxy_of_consumer.o
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obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
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obj-$(CONFIG_QCOM_IPCC) += qcom_ipcc.o
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obj-$(CONFIG_QCOM_RIMPS) += qcom_rimps.o
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obj-$(CONFIG_QCOM_RUN_QUEUE_STATS) += rq_stats.o
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obj-$(CONFIG_QCOM_APR) += apr.o
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obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
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obj-$(CONFIG_QCOM_LLCC) += qcom_llcc.o
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qcom_llcc-y += llcc-slice.o llcc-tcm.o
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obj-$(CONFIG_QCOM_LAHAINA_LLCC) += llcc-lahaina.o
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obj-$(CONFIG_QCOM_SDXLEMUR_LLCC) += llcc-sdxlemur.o
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obj-$(CONFIG_QCOM_SHIMA_LLCC) += llcc-shima.o
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obj-$(CONFIG_QCOM_YUPIK_LLCC) += llcc-yupik.o
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obj-$(CONFIG_QCOM_SM8150_LLCC) += llcc-sm8150.o
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obj-$(CONFIG_QCOM_SDMSHRIKE_LLCC) += llcc-sdmshrike.o
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obj-$(CONFIG_QCOM_SM6150_LLCC) += llcc-sm6150.o
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obj-$(CONFIG_QCOM_DIREWOLF_LLCC) += llcc-direwolf.o
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obj-$(CONFIG_QCOM_MINIDUMP) += msm_minidump.o minidump_log.o
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obj-$(CONFIG_QCOM_MEM_OFFLINE) += mem-offline.o
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obj-$(CONFIG_QCOM_MEM_BUF) += mem-buf.o mem_buf_dma_buf.o
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obj-$(CONFIG_QCOM_MEMORY_DUMP_V2) += memory_dump_v2.o
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obj-$(CONFIG_QCOM_DCC_V2) += dcc_v2.o
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obj-$(CONFIG_MSM_JTAGV8) += jtagv8.o jtagv8-etm.o
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obj-$(CONFIG_QCOM_SMCINVOKE) += smcinvoke.o
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obj-$(CONFIG_QCOM_MICRODUMP) += microdump_collector.o
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obj-$(CONFIG_QCOM_SDM845_LLCC) += llcc-sdm845.o
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obj-$(CONFIG_QCOM_LLCC_PERFMON) += llcc_perfmon.o
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obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
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obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
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obj-$(CONFIG_QMP_DEBUGFS_CLIENT) += qmp-debugfs-client.o
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obj-$(CONFIG_QCOM_SMP2P_SLEEPSTATE) += smp2p_sleepstate.o
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obj-$(CONFIG_SENSORS_SSC) += sensors_ssc.o
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obj-$(CONFIG_QCOM_GLINK_PKT) += glink_pkt.o
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obj-$(CONFIG_QSEE_IPC_IRQ) += qsee_ipc_irq.o
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obj-$(CONFIG_QCOM_GLINK) += glink_probe.o
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obj-$(CONFIG_MSM_GLINK_SSR) += msm_glink_ssr.o
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obj-$(CONFIG_QTI_PMIC_GLINK) += pmic_glink.o
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obj-$(CONFIG_QTI_BATTERY_GLINK_DEBUG) += qti_battery_debug.o
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obj-$(CONFIG_QTI_ALTMODE_GLINK) += altmode-glink.o
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obj-$(CONFIG_QTI_PMIC_PON_LOG) += pmic-pon-log.o
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obj-$(CONFIG_QTI_DDR_STATS_LOG) += ddr_stats.o
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obj-$(CONFIG_QTI_SYSTEM_PM) += system_pm.o
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obj-$(CONFIG_QTI_SYSTEM_PM_RPM) += system_pm_rpm.o
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obj-$(CONFIG_MSM_REMOTEQDSS) += remoteqdss.o
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obj-$(CONFIG_MSM_SPSS_UTILS) += spss_utils.o
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obj-$(CONFIG_MSM_IDLE_STATS) += lpm-stats.o
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obj-$(CONFIG_MSM_PERFORMANCE) += msm_performance.o
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obj-$(CONFIG_QTI_RPM_STATS_LOG) += rpmh_master_stat.o
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ifdef CONFIG_MSM_RPM_SMD
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obj-$(CONFIG_QTI_RPM_STATS_LOG) += rpm_master_stat.o
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endif
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obj-$(CONFIG_QPNP_PBS) += qpnp-pbs.o
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obj-$(CONFIG_MSM_SPCOM) += spcom.o
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obj-$(CONFIG_QCOM_CDSP_RM) += cdsprm.o
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obj-$(CONFIG_QCOM_FSA4480_I2C) += fsa4480-i2c.o
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obj-$(CONFIG_QCOM_EUD) += eud.o
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obj-$(CONFIG_QCOM_GUESTVM) += guestvm_loader.o
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obj-$(CONFIG_QCOM_HYP_CORE_CTL) += hyp_core_ctl.o
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obj-$(CONFIG_MSM_QBT_HANDLER) += qbt_handler.o
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obj-$(CONFIG_QTI_CRYPTO_COMMON) += crypto-qti-common.o
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obj-$(CONFIG_QTI_CRYPTO_TZ) += crypto-qti-tz.o
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obj-$(CONFIG_QTI_CRYPTO_VIRTUALIZATION) += crypto-qti-virt.o
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obj-$(CONFIG_QTI_HW_KEY_MANAGER) += hwkm.o crypto-qti-hwkm.o
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obj-$(CONFIG_QCOM_WDT_CORE) += qcom_wdt_core.o
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obj-$(CONFIG_QCOM_SOC_WATCHDOG) += qcom_soc_wdt.o
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obj-$(CONFIG_MSM_HAB) += hab/
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obj-$(CONFIG_QCOM_HGSL) += hgsl/
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obj-$(CONFIG_SDX_EXT_IPC) += sdx_ext_ipc.o
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ifdef CONFIG_DEBUG_FS
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obj-$(CONFIG_MSM_RPM_SMD) += rpm-smd-debug.o
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endif
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obj-$(CONFIG_QTI_SYS_PM_VX) += sys_pm_vx.o
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obj-$(CONFIG_ICNSS2) += icnss2/
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obj-$(CONFIG_QTI_PLH_SCMI_CLIENT) += plh_scmi.o
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obj-$(CONFIG_QCOM_SYSMON_SUBSYSTEM_STATS) += sysmon_subsystem_stats.o
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obj-$(CONFIG_QTI_HW_MEMLAT_SCMI_CLIENT) += memlat_scmi.o
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obj-$(CONFIG_QTI_HW_MEMLAT) += rimps_memlat.o
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obj-$(CONFIG_QTI_HW_MEMLAT_LOG) += rimps_log.o
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obj-$(CONFIG_QCOM_QFPROM_SYS) += qfprom-sys.o
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obj-$(CONFIG_RENAME_BLOCK_DEVICE) += rename_block_device.o
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obj-$(CONFIG_QCOM_ADSP_MANUAL_VOTE) += adsp_vote_qmi.o adsp_lpm_voting_v01.o
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obj-$(CONFIG_MSM_SLATECOM) += slatecom_spi.o
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obj-$(CONFIG_MSM_SLATECOM_INTERFACE) += slatecom_interface.o
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obj-$(CONFIG_QCOM_AOP_SET_DDR) += aop-set-ddr.o
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obj-$(CONFIG_CPU_V7) += idle-v7.o
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obj-$(CONFIG_DUMP_XBL_LOG) += dump_boot_log.o
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obj-$(CONFIG_QCOM_CX_IPEAK) += cx_ipeak.o
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# GNSS driver
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obj-$(CONFIG_GNSS_SIRF) += gnsssirf/
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obj-$(CONFIG_MSM_SEB) += slate_events_bridge.o
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obj-$(CONFIG_MSM_SEB_RPMSG) += slate_events_bridge_rpmsg.o
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100
drivers/soc/qcom/llcc-sdm845.c
Normal file
100
drivers/soc/qcom/llcc-sdm845.c
Normal file
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@ -0,0 +1,100 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/soc/qcom/llcc-qcom.h>
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/*
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* SCT(System Cache Table) entry contains of the following members:
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* usecase_id: Unique id for the client's use case
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* slice_id: llcc slice id for each client
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* max_cap: The maximum capacity of the cache slice provided in KB
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* priority: Priority of the client used to select victim line for replacement
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* fixed_size: Boolean indicating if the slice has a fixed capacity
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* bonus_ways: Bonus ways are additional ways to be used for any slice,
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* if client ends up using more than reserved cache ways. Bonus
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* ways are allocated only if they are not reserved for some
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* other client.
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* res_ways: Reserved ways for the cache slice, the reserved ways cannot
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* be used by any other client than the one its assigned to.
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* cache_mode: Each slice operates as a cache, this controls the mode of the
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* slice: normal or TCM(Tightly Coupled Memory)
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* probe_target_ways: Determines what ways to probe for access hit. When
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* configured to 1 only bonus and reserved ways are probed.
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* When configured to 0 all ways in llcc are probed.
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* dis_cap_alloc: Disable capacity based allocation for a client
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* retain_on_pc: If this bit is set and client has maintained active vote
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* then the ways assigned to this client are not flushed on power
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* collapse.
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* activate_on_init: Activate the slice immediately after the SCT is programmed
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*/
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#define SCT_ENTRY(uid, sid, mc, p, fs, bway, rway, cmod, ptw, dca, rp, a) \
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{ \
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.usecase_id = uid, \
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.slice_id = sid, \
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.max_cap = mc, \
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.priority = p, \
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.fixed_size = fs, \
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.bonus_ways = bway, \
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.res_ways = rway, \
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.cache_mode = cmod, \
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.probe_target_ways = ptw, \
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.dis_cap_alloc = dca, \
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.retain_on_pc = rp, \
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.activate_on_init = a, \
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}
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static struct llcc_slice_config sdm845_data[] = {
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SCT_ENTRY(LLCC_CPUSS, 1, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 1),
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SCT_ENTRY(LLCC_VIDSC0, 2, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_VIDSC1, 3, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_ROTATOR, 4, 563, 2, 1, 0x0, 0x00e, 2, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_VOICE, 5, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_AUDIO, 6, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xfc, 0xf00, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MDM, 8, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_CMPT, 10, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_GPUHTW, 11, 512, 1, 1, 0xc, 0x0, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_GPU, 12, 2304, 1, 0, 0xff0, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MMUHWT, 13, 256, 2, 0, 0x0, 0x1, 0, 0, 1, 0, 1),
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SCT_ENTRY(LLCC_CMPTDMA, 15, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_DISP, 16, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_VIDFW, 17, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MDMHPFX, 20, 1024, 2, 1, 0x0, 0xf00, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_MDMPNG, 21, 1024, 0, 1, 0x1e, 0x0, 0, 0, 1, 1, 0),
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SCT_ENTRY(LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0),
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};
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static int sdm845_qcom_llcc_remove(struct platform_device *pdev)
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{
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return qcom_llcc_remove(pdev);
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}
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static int sdm845_qcom_llcc_probe(struct platform_device *pdev)
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{
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return qcom_llcc_probe(pdev, sdm845_data, ARRAY_SIZE(sdm845_data));
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}
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static const struct of_device_id sdm845_qcom_llcc_of_match[] = {
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{ .compatible = "qcom,sdm845-llcc", },
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{ }
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};
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static struct platform_driver sdm845_qcom_llcc_driver = {
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.driver = {
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.name = "sdm845-llcc",
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.of_match_table = sdm845_qcom_llcc_of_match,
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},
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.probe = sdm845_qcom_llcc_probe,
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.remove = sdm845_qcom_llcc_remove,
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};
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module_platform_driver(sdm845_qcom_llcc_driver);
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MODULE_DESCRIPTION("QCOM sdm845 LLCC driver");
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MODULE_LICENSE("GPL v2");
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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*
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*/
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@ -11,12 +11,11 @@
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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#include <linux/soc/qcom/llcc-qcom.h>
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#include <linux/soc/qcom/llcc-tcm.h>
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#define ACTIVATE BIT(0)
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#define DEACTIVATE BIT(1)
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@ -45,28 +44,17 @@
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#define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n)
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#define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n)
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#define BANK_OFFSET_STRIDE 0x80000
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#define LLCC_TRP_C_AS_NC 0x22890
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#define LLCC_TRP_NC_AS_C 0x22894
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#define LLCC_FEAC_C_AS_NC 0x35030
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#define LLCC_FEAC_NC_AS_C 0x35034
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#define LLCC_TRP_WRSC_EN 0x21F20
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#define LLCC_WRSC_SCID_EN(n) BIT(n)
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static struct llcc_slice_config sdm845_data[] = {
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{ LLCC_CPUSS, 1, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 1 },
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{ LLCC_VIDSC0, 2, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 },
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{ LLCC_VIDSC1, 3, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 },
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{ LLCC_ROTATOR, 4, 563, 2, 1, 0x0, 0x00e, 2, 0, 1, 1, 0 },
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{ LLCC_VOICE, 5, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
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{ LLCC_AUDIO, 6, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
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{ LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xfc, 0xf00, 0, 0, 1, 1, 0 },
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{ LLCC_MDM, 8, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
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{ LLCC_CMPT, 10, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
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{ LLCC_GPUHTW, 11, 512, 1, 1, 0xc, 0x0, 0, 0, 1, 1, 0 },
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{ LLCC_GPU, 12, 2304, 1, 0, 0xff0, 0x2, 0, 0, 1, 1, 0 },
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{ LLCC_MMUHWT, 13, 256, 2, 0, 0x0, 0x1, 0, 0, 1, 0, 1 },
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{ LLCC_CMPTDMA, 15, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
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{ LLCC_DISP, 16, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
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{ LLCC_VIDFW, 17, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
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{ LLCC_MDMHPFX, 20, 1024, 2, 1, 0x0, 0xf00, 0, 0, 1, 1, 0 },
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{ LLCC_MDMPNG, 21, 1024, 0, 1, 0x1e, 0x0, 0, 0, 1, 1, 0 },
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{ LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0 },
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};
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#define LLCC_TRP_PCB_ACT 0x21F04
|
||||
#define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21F00
|
||||
|
||||
#define BANK_OFFSET_STRIDE 0x80000
|
||||
|
||||
static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
|
||||
|
||||
|
|
@ -273,9 +261,16 @@ static int qcom_llcc_cfg_program(struct platform_device *pdev)
|
|||
u32 attr0_val;
|
||||
u32 max_cap_cacheline;
|
||||
u32 sz;
|
||||
u32 pcb = 0;
|
||||
u32 cad = 0;
|
||||
u32 wren = 0;
|
||||
int ret = 0;
|
||||
const struct llcc_slice_config *llcc_table;
|
||||
struct llcc_slice_desc desc;
|
||||
bool cap_based_alloc_and_pwr_collapse =
|
||||
drv_data->cap_based_alloc_and_pwr_collapse;
|
||||
int v2_ver = of_device_is_compatible(pdev->dev.of_node,
|
||||
"qcom,llcc-v2");
|
||||
|
||||
sz = drv_data->cfg_size;
|
||||
llcc_table = drv_data->cfg;
|
||||
|
|
@ -315,6 +310,32 @@ static int qcom_llcc_cfg_program(struct platform_device *pdev)
|
|||
attr0_val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (v2_ver) {
|
||||
wren |= llcc_table[i].write_scid_en <<
|
||||
llcc_table[i].slice_id;
|
||||
ret = regmap_write(drv_data->bcast_regmap,
|
||||
LLCC_TRP_WRSC_EN, wren);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (cap_based_alloc_and_pwr_collapse) {
|
||||
cad |= llcc_table[i].dis_cap_alloc <<
|
||||
llcc_table[i].slice_id;
|
||||
ret = regmap_write(drv_data->bcast_regmap,
|
||||
LLCC_TRP_SCID_DIS_CAP_ALLOC, cad);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
pcb |= llcc_table[i].retain_on_pc <<
|
||||
llcc_table[i].slice_id;
|
||||
ret = regmap_write(drv_data->bcast_regmap,
|
||||
LLCC_TRP_PCB_ACT, pcb);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (llcc_table[i].activate_on_init) {
|
||||
desc.slice_id = llcc_table[i].slice_id;
|
||||
ret = llcc_slice_activate(&desc);
|
||||
|
|
@ -323,12 +344,13 @@ static int qcom_llcc_cfg_program(struct platform_device *pdev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int qcom_llcc_remove(struct platform_device *pdev)
|
||||
int qcom_llcc_remove(struct platform_device *pdev)
|
||||
{
|
||||
/* Set the global pointer to a error code to avoid referencing it */
|
||||
drv_data = ERR_PTR(-ENODEV);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(qcom_llcc_remove);
|
||||
|
||||
static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev,
|
||||
const char *name)
|
||||
|
|
@ -348,16 +370,14 @@ static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev,
|
|||
return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config);
|
||||
}
|
||||
|
||||
static int qcom_llcc_probe(struct platform_device *pdev,
|
||||
const struct llcc_slice_config *llcc_cfg, u32 sz)
|
||||
int qcom_llcc_probe(struct platform_device *pdev,
|
||||
const struct llcc_slice_config *llcc_cfg, u32 sz)
|
||||
{
|
||||
u32 num_banks;
|
||||
struct device *dev = &pdev->dev;
|
||||
int ret, i;
|
||||
struct platform_device *llcc_edac;
|
||||
|
||||
if (!IS_ERR(drv_data))
|
||||
return -EBUSY;
|
||||
struct platform_device *llcc_edac, *llcc_perfmon;
|
||||
struct device_node *tcm_memory_node;
|
||||
|
||||
drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL);
|
||||
if (!drv_data) {
|
||||
|
|
@ -373,7 +393,10 @@ static int qcom_llcc_probe(struct platform_device *pdev,
|
|||
|
||||
drv_data->bcast_regmap =
|
||||
qcom_llcc_init_mmio(pdev, "llcc_broadcast_base");
|
||||
if (IS_ERR(drv_data->bcast_regmap)) {
|
||||
|
||||
if (PTR_ERR(drv_data->bcast_regmap) == -ENODEV)
|
||||
drv_data->bcast_regmap = drv_data->regmap;
|
||||
else if (IS_ERR(drv_data->bcast_regmap)) {
|
||||
ret = PTR_ERR(drv_data->bcast_regmap);
|
||||
goto err;
|
||||
}
|
||||
|
|
@ -398,6 +421,10 @@ static int qcom_llcc_probe(struct platform_device *pdev,
|
|||
goto err;
|
||||
}
|
||||
|
||||
drv_data->cap_based_alloc_and_pwr_collapse =
|
||||
of_property_read_bool(pdev->dev.of_node,
|
||||
"cap-based-alloc-and-pwr-collapse");
|
||||
|
||||
for (i = 0; i < num_banks; i++)
|
||||
drv_data->offsets[i] = i * BANK_OFFSET_STRIDE;
|
||||
|
||||
|
|
@ -415,48 +442,42 @@ static int qcom_llcc_probe(struct platform_device *pdev,
|
|||
platform_set_drvdata(pdev, drv_data);
|
||||
|
||||
ret = qcom_llcc_cfg_program(pdev);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
pr_err("llcc configuration failed!!\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
drv_data->ecc_irq = platform_get_irq(pdev, 0);
|
||||
if (drv_data->ecc_irq >= 0) {
|
||||
llcc_edac = platform_device_register_data(&pdev->dev,
|
||||
"qcom_llcc_edac", -1, drv_data,
|
||||
sizeof(*drv_data));
|
||||
if (IS_ERR(llcc_edac))
|
||||
dev_err(dev, "Failed to register llcc edac driver\n");
|
||||
llcc_edac = platform_device_register_data(&pdev->dev,
|
||||
"qcom_llcc_edac", -1, drv_data,
|
||||
sizeof(*drv_data));
|
||||
if (IS_ERR(llcc_edac))
|
||||
dev_err(dev, "Failed to register llcc edac driver\n");
|
||||
|
||||
llcc_perfmon = platform_device_register_data(&pdev->dev,
|
||||
"qcom_llcc_perfmon", -1,
|
||||
drv_data, sizeof(*drv_data));
|
||||
if (IS_ERR(llcc_perfmon))
|
||||
dev_err(dev, "Failed to register llcc perfmon device\n");
|
||||
|
||||
tcm_memory_node = of_parse_phandle(dev->of_node, "memory-region", 0);
|
||||
if (tcm_memory_node) {
|
||||
ret = qcom_llcc_tcm_probe(pdev, llcc_cfg, sz, tcm_memory_node);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to probe TCM manager\n");
|
||||
goto err_dereg;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_dereg:
|
||||
platform_device_unregister(llcc_edac);
|
||||
platform_device_unregister(llcc_perfmon);
|
||||
err:
|
||||
drv_data = ERR_PTR(-ENODEV);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sdm845_qcom_llcc_remove(struct platform_device *pdev)
|
||||
{
|
||||
return qcom_llcc_remove(pdev);
|
||||
}
|
||||
|
||||
static int sdm845_qcom_llcc_probe(struct platform_device *pdev)
|
||||
{
|
||||
return qcom_llcc_probe(pdev, sdm845_data, ARRAY_SIZE(sdm845_data));
|
||||
}
|
||||
|
||||
static const struct of_device_id sdm845_qcom_llcc_of_match[] = {
|
||||
{ .compatible = "qcom,sdm845-llcc", },
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct platform_driver sdm845_qcom_llcc_driver = {
|
||||
.driver = {
|
||||
.name = "sdm845-llcc",
|
||||
.of_match_table = sdm845_qcom_llcc_of_match,
|
||||
},
|
||||
.probe = sdm845_qcom_llcc_probe,
|
||||
.remove = sdm845_qcom_llcc_remove,
|
||||
};
|
||||
module_platform_driver(sdm845_qcom_llcc_driver);
|
||||
|
||||
MODULE_DESCRIPTION("QCOM sdm845 LLCC driver");
|
||||
EXPORT_SYMBOL_GPL(qcom_llcc_probe);
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller");
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
*/
|
||||
|
||||
|
|
@ -16,6 +16,7 @@
|
|||
#define LLCC_AUDIO 6
|
||||
#define LLCC_MDMHPGRW 7
|
||||
#define LLCC_MDM 8
|
||||
#define LLCC_MDMHW 9
|
||||
#define LLCC_CMPT 10
|
||||
#define LLCC_GPUHTW 11
|
||||
#define LLCC_GPU 12
|
||||
|
|
@ -26,6 +27,19 @@
|
|||
#define LLCC_MDMHPFX 20
|
||||
#define LLCC_MDMPNG 21
|
||||
#define LLCC_AUDHW 22
|
||||
#define LLCC_NPU 23
|
||||
#define LLCC_WLNHW 24
|
||||
#define LLCC_PIMEM 25
|
||||
#define LLCC_DRE 26
|
||||
#define LLCC_CVP 28
|
||||
#define LLCC_MDMVPE 29
|
||||
#define LLCC_APTCM 30
|
||||
#define LLCC_WRTCH 31
|
||||
#define LLCC_CVPFW 32
|
||||
#define LLCC_CPUSS1 33
|
||||
#define LLCC_CMPT1 34
|
||||
#define LLCC_CPUHWT 36
|
||||
#define LLCC_MDMCLD2 37
|
||||
|
||||
/**
|
||||
* llcc_slice_desc - Cache slice descriptor
|
||||
|
|
@ -39,27 +53,19 @@ struct llcc_slice_desc {
|
|||
|
||||
/**
|
||||
* llcc_slice_config - Data associated with the llcc slice
|
||||
* @usecase_id: Unique id for the client's use case
|
||||
* @slice_id: llcc slice id for each client
|
||||
* @max_cap: The maximum capacity of the cache slice provided in KB
|
||||
* @priority: Priority of the client used to select victim line for replacement
|
||||
* @fixed_size: Boolean indicating if the slice has a fixed capacity
|
||||
* @bonus_ways: Bonus ways are additional ways to be used for any slice,
|
||||
* if client ends up using more than reserved cache ways. Bonus
|
||||
* ways are allocated only if they are not reserved for some
|
||||
* other client.
|
||||
* @res_ways: Reserved ways for the cache slice, the reserved ways cannot
|
||||
* be used by any other client than the one its assigned to.
|
||||
* @cache_mode: Each slice operates as a cache, this controls the mode of the
|
||||
* slice: normal or TCM(Tightly Coupled Memory)
|
||||
* @probe_target_ways: Determines what ways to probe for access hit. When
|
||||
* configured to 1 only bonus and reserved ways are probed.
|
||||
* When configured to 0 all ways in llcc are probed.
|
||||
* @dis_cap_alloc: Disable capacity based allocation for a client
|
||||
* @retain_on_pc: If this bit is set and client has maintained active vote
|
||||
* then the ways assigned to this client are not flushed on power
|
||||
* collapse.
|
||||
* @activate_on_init: Activate the slice immediately after it is programmed
|
||||
* @usecase_id: usecase id for which the llcc slice is used
|
||||
* @slice_id: llcc slice id assigned to each slice
|
||||
* @max_cap: maximum capacity of the llcc slice
|
||||
* @priority: priority of the llcc slice
|
||||
* @fixed_size: whether the llcc slice can grow beyond its size
|
||||
* @bonus_ways: bonus ways associated with llcc slice
|
||||
* @res_ways: reserved ways associated with llcc slice
|
||||
* @cache_mode: mode of the llcc slice
|
||||
* @probe_target_ways: Probe only reserved and bonus ways on a cache miss
|
||||
* @dis_icap_alloc: Disable capacity based allocation
|
||||
* @write_scid_en: Enables write cache support for a given scid.
|
||||
* @retain_on_pc: Retain through power collapse
|
||||
* @activate_on_init: activate the slice on init
|
||||
*/
|
||||
struct llcc_slice_config {
|
||||
u32 usecase_id;
|
||||
|
|
@ -72,6 +78,7 @@ struct llcc_slice_config {
|
|||
u32 cache_mode;
|
||||
u32 probe_target_ways;
|
||||
bool dis_cap_alloc;
|
||||
bool write_scid_en;
|
||||
bool retain_on_pc;
|
||||
bool activate_on_init;
|
||||
};
|
||||
|
|
@ -100,6 +107,7 @@ struct llcc_drv_data {
|
|||
unsigned long *bitmap;
|
||||
u32 *offsets;
|
||||
int ecc_irq;
|
||||
bool cap_based_alloc_and_pwr_collapse;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -163,6 +171,20 @@ int llcc_slice_activate(struct llcc_slice_desc *desc);
|
|||
*/
|
||||
int llcc_slice_deactivate(struct llcc_slice_desc *desc);
|
||||
|
||||
/**
|
||||
* qcom_llcc_probe - program the sct table
|
||||
* @pdev: platform device pointer
|
||||
* @table: soc sct table
|
||||
* @sz: Size of the config table
|
||||
*/
|
||||
int qcom_llcc_probe(struct platform_device *pdev,
|
||||
const struct llcc_slice_config *table, u32 sz);
|
||||
|
||||
/**
|
||||
* qcom_llcc_remove - remove the sct table
|
||||
* @pdev: Platform device pointer
|
||||
*/
|
||||
int qcom_llcc_remove(struct platform_device *pdev);
|
||||
#else
|
||||
static inline struct llcc_slice_desc *llcc_slice_getd(u32 uid)
|
||||
{
|
||||
|
|
@ -192,6 +214,16 @@ static inline int llcc_slice_deactivate(struct llcc_slice_desc *desc)
|
|||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
static inline int qcom_llcc_probe(struct platform_device *pdev,
|
||||
const struct llcc_slice_config *table, u32 sz)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int qcom_llcc_remove(struct platform_device *pdev)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue