icc: dt-bindings: add endpoint IDs for interconnects for MONACO

Add master and slave IDs for all Qualcomm Technologies, Inc. Monaco
interconnect providers which consumers can use to set bandwidth
constraints and find paths in the NoC (Network-On-Chip) topology.

Change-Id: Id2e816a74e382946c02345a5d1e39ed1d913ef90
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>

include/dt-bindings/interconnect/qcom,monaco.h

@@ -0,0 +1,100 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MONACO_H
+#define __DT_BINDINGS_INTERCONNECT_QCOM_MONACO_H
+
+#define MASTER_AMPSS_M0				0
+#define MASTER_SNOC_BIMC_RT				1
+#define MASTER_SNOC_BIMC_NRT				2
+#define SNOC_BIMC_MAS				3
+#define MASTER_GRAPHICS_3D				4
+#define MASTER_TCU_0				5
+#define MASTER_QUP_CORE_0				6
+#define MASTER_CRYPTO_CORE0				7
+#define SNOC_CNOC_MAS				8
+#define MASTER_QDSS_DAP				9
+#define MASTER_CAMNOC_SF				10
+#define MASTER_VIDEO_P0				11
+#define MASTER_VIDEO_PROC				12
+#define MASTER_CAMNOC_HF				13
+#define MASTER_MDP_PORT0				14
+#define MASTER_SNOC_CFG				15
+#define MASTER_TIC				16
+#define MASTER_ANOC_SNOC				17
+#define BIMC_SNOC_MAS				18
+#define MASTER_PIMEM				19
+#define MASTER_CRVIRT_A1NOC				20
+#define MASTER_QDSS_BAM				21
+#define MASTER_QUP_0				22
+#define CNOC_SNOC_MAS				23
+#define MASTER_IPA				24
+#define MASTER_QDSS_ETR				25
+#define MASTER_SDCC_1				26
+#define MASTER_SDCC_2				27
+#define MASTER_USB3				28
+#define SLAVE_EBI_CH0				512
+#define BIMC_SNOC_SLV				513
+#define SLAVE_QUP_CORE_0				514
+#define SLAVE_CRVIRT_A1NOC				515
+#define SLAVE_AHB2PHY_USB				516
+#define SLAVE_BIMC_CFG				517
+#define SLAVE_BOOT_ROM				518
+#define SLAVE_CAMERA_NRT_THROTTLE_CFG				519
+#define SLAVE_CAMERA_RT_THROTTLE_CFG				520
+#define SLAVE_CAMERA_CFG				521
+#define SLAVE_CLK_CTL				522
+#define SLAVE_RBCPR_CX_CFG				523
+#define SLAVE_RBCPR_MXA_CFG				524
+#define SLAVE_RBCPR_MXC_CFG				525
+#define SLAVE_CRYPTO_0_CFG				526
+#define SLAVE_DCC_CFG				527
+#define SLAVE_DDR_PHY_CFG				528
+#define SLAVE_DDR_SS_CFG				529
+#define SLAVE_DDRSS_THROTTLE_CFG				530
+#define SLAVE_DISPLAY_CFG				531
+#define SLAVE_DISPLAY_THROTTLE_CFG				532
+#define SLAVE_GPU_CFG				533
+#define SLAVE_HWKM				534
+#define SLAVE_IMEM_CFG				535
+#define SLAVE_IPA_CFG				536
+#define SLAVE_LPASS				537
+#define SLAVE_MAPSS				538
+#define SLAVE_MDSP_MPU_CFG				539
+#define SLAVE_MESSAGE_RAM				540
+#define SLAVE_CNOC_MSS				541
+#define SLAVE_PDM				542
+#define SLAVE_PIMEM_CFG				543
+#define SLAVE_PKA_WRAPPER_CFG				544
+#define SLAVE_PMIC_ARB				545
+#define SLAVE_QDSS_CFG				546
+#define SLAVE_QM_CFG				547
+#define SLAVE_QM_MPU_CFG				548
+#define SLAVE_QUP_0				549
+#define SLAVE_RPM				550
+#define SLAVE_SDCC_1				551
+#define SLAVE_SDCC_2				552
+#define SLAVE_SECURITY				553
+#define SLAVE_SNOC_CFG				554
+#define SLAVE_TCSR				555
+#define SLAVE_TLMM				556
+#define SLAVE_USB3				557
+#define SLAVE_VENUS_CFG				558
+#define SLAVE_VENUS_THROTTLE_CFG				559
+#define SLAVE_VSENSE_CTRL_CFG				560
+#define CNOC_SNOC_SLV				561
+#define SLAVE_TCU				562
+#define SLAVE_SNOC_BIMC_NRT				563
+#define SLAVE_SNOC_BIMC_RT				564
+#define SLAVE_APPSS				565
+#define SNOC_CNOC_SLV				566
+#define SLAVE_OCIMEM				567
+#define SLAVE_PIMEM				568
+#define SNOC_BIMC_SLV				569
+#define SLAVE_SERVICE_SNOC				570
+#define SLAVE_QDSS_STM				571
+#define SLAVE_ANOC_SNOC				572
+
+#endif